Multi-chassis broadcast router having a common clock

ABSTRACT

Supportably mounted by each chassis of a multi-chassis broadcast router are primary router matrix cards, redundant router matrix cards and clock-demanding input and output cards. A first master clock firesides on the primary router matrix card of a first chassis while a second master clock firesides on the redundant router matrix card of a second chassis. Each master clock is configured to provide a respective common clock signal to all of the input and output cards of the first and second chassis. Control logic determines whether the first master clock or the second master clock issues the common clock signal.

CROSS REFERENCE

This application is related to U.S. Provisional Patent Application Ser.No. 60/390,846 filed Jun. 21, 2002.

This application is also related to co-pending U.S. Patent ApplicationSer. Nos. PCT/______ (Atty. Docket No. IU010620), PCT/______ (Atty.Docket No. IU020157), PCT/______ (Atty. Docket No. IT020158), PCT/______(Atty. Docket No. IU020159), PCT/______ (Atty. Docket No. IU020160),PCT/______ (Atty. Docket No. IU020161), PCT/______ (Atty. Docket No.IU020162), PCT/______ (Atty. Docket No. IU020252), PCT/______ (Atty.Docket No. IU020254), PCT/______ (Atty. Docket No. IU020255) andPCT/______ (Atty. Docket No. IU020256), all of which were assigned tothe Assignee of the present application and hereby incorporated byreference as if reproduced in their entirety.

FIELD OF THE INVENTION

The present invention relates to broadcast routers and, moreparticularly, to a multi-chassis broadcast router having a common clock.

BACKGROUND OF THE INVENTION

A broadcast router allows each one of a plurality of outputs therefromto be assigned the signal from any one of a plurality of inputs thereto.For example, an N×M broadcast router has N inputs and M outputs coupledtogether by a router matrix which allows any one of the N inputs to beapplied to each one of the M outputs. Many such broadcast routers arecomprised of a single chassis which houses plural printed circuitboards, commonly referred to as “cards”, interconnected in a widevariety of configurations. Oftentimes, larger broadcast routers areconstructed by interconnecting plural smaller broadcast routers. Forexample, in U.S. patent application Ser. No. 10/______ (Atty. Docket No.IU020160) and previously incorporated by reference, a fully redundant,linearly expandable 1,280×1,280 broadcast router formed byinterconnecting five 256×256 broadcast routers was disclosed. In orderfor the multi-chassis broadcast router disclosed in that application tofunction, however, the same clock must be available in each chassis.

SUMMARY OF THE INVENTION

In one embodiment, the present invention is directed to a multi-chassisbroadcast router which includes plural chassis, in each of which arouting engine and at least one clock-demanding component reside. Alsoresiding in a first one of the plural chassis is a master clock which iscoupled to the clock-demanding components residing in each chassis ofthe broadcast router. Preferably, an input side of each routing engineof the broadcast router are coupled to one another in a fully connectedtopology by plural links which are also employed to distribute a commonclock signal from the master clock to all of the clock-demandingcomponents.

In another embodiment, the present invention is directed to amulti-chassis broadcast router which includes first and second chassis.Each chassis supportably mounts a primary router matrix card, aredundant router matrix card, at least one clock-demanding input cardand at least one clock-demanding output card. A first master clockresides on the primary router matrix card supportably mounted by thefirst chassis while a second master clock resides on the redundantrouter matrix card supportably mounted by the second chassis. Eachmaster clock is coupled to each of the clock-demanding input and outputcards supportably mounted by the first chassis as well as theclock-demanding input and output cards supportably mounted by the secondchassis. The first master clock supplies the clock-demanding cardscoupled thereto with a common clock signal while, in the absence of thecommon clock signal, the second master clock will supply theclock-demanding cards coupled thereto with a redundant common clocksignal. Control logic coupled to both the first and second master clocksdetermines whether the first master clock should issue the common clocksignal or whether the second master clock should issue the redundantcommon clock signal in the absence of the common clock signal.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a fully redundant, linear expandablebroadcast router; FIG. 2 is an expanded block diagram of a firstbroadcast router component of the fully redundant, linearly expandablebroadcast router of FIG. 1;

FIG. 3 is an expanded block diagram of a second broadcast routercomponent of the fully redundant, linearly expandable broadcast routerof FIG. 1;

FIG. 4 is a state diagram for a state machine of the first broadcastrouter component of FIG. 2; and

FIG. 5 is a state diagram for a state machine of the second broadcastrouter component of FIG. 4.

DETAILED DESCRIPTION

Referring first to FIG. 1, a multi-chassis broadcast router 100configured such that, in accordance with one aspect of the teachings ofthe present invention, each chassis thereof shares a common clock, willnow be described in greater detail. As disclosed herein, the broadcastrouter 100 is a fully redundant, linearly expandable broadcast router.It should be clearly understood, however, that it is fully contemplatedthat other types of multi-chassis broadcast routers besides the specifictype of multi-chassis broadcast router disclosed herein may also beconfigured to share a common clock. It should be further understood thatthe teachings of the present invention are equally applicable tobroadcast routers configured to include plural broadcast routercomponents housed within a common chassis.

As may now be seen, the multi-chassis, fully redundant, linearlyexpandable broadcast router 100 is comprised of plural broadcast routercomponents, each housed within a respective chassis, coupled to oneanother to form the larger fully redundant linearly expandable broadcastrouter 100. Each broadcast router component is a discrete router devicewhich includes a first (or “primary”) router matrix card and a second(or “redundant”) router matrix card. Thus, each broadcast routercomponent has first and second routing engines, one residing on each ofthe primary-and-redundant router matrix cards. As will be more fullydescribed below, each one of the first and second routing engines of abroadcast router component receives, at an input side thereof, the sameN input digital audio data streams and places, at an output sidethereof, the same M output digital audio data streams. As disclosedherein, each of the broadcast router components used to construct themulti-chassis, fully redundant, linearly expandable broadcast router areN x M sized broadcast routers. However, it is fully contemplated thatthe multi-chassis, fully redundant, linearly expandable broadcast router100 could instead be constructed of broadcast router components ofdifferent sizes relative to one another.

As further disclosed herein, the multi-chassis, fully redundant,linearly expandable broadcast router 100 is formed by coupling togetherfirst, second, third and fourth broadcast router components 102, 104,106 and 108, each of which is housed in a discrete chassis. Of course,the present disclosure of the multi-chassis, fully redundant, linearlyexpandable broadcast router 100 as being formed of four broadcast routercomponents 102, 104, 106 and 108 is purely by way of example.Accordingly, it should be clearly understood that a multi-chassis, fullyredundant, linearly expandable broadcast router constructed inaccordance with the teachings of the present invention may be formedusing various other numbers of broadcast router components. As may beseen in FIG. 1, the first, second, third and fourth broadcast routercomponents 102, 104, 106 and 108 which, when fully connected in themanner disclosed herein, collectively form the multi-chassis, fullyredundant, linearly expandable broadcast router 100, are housed inrespective chassis. In the alternative, of course, the first, second,third and fourth broadcast router components 102, 104, 106 and 108 mayinstead be housed together in a common chassis. Further, while, aspreviously set forth, each one of the first, second, third and fourthbroadcast router components 102, 104, 106 and 108 may have differentsizes relative to one another or, in the alternative, may all have thesame N×M size, one size that has proven suitable for the usescontemplated herein is 256×256. Finally, a suitable configuration forthe multi-chassis fully redundant, linear expandable broadcast router100 would be to couple five broadcast router components, each sized at256×256 and housed in a discrete chassis, thereby resulting in a1,280×1,280 broadcast router.

The first broadcast router component 102 of the multi-chassis, fullyredundant, linearly expandable broadcast router 100 includes a chassis102 c, within which a primary router matrix card 102 a and a redundantrouter matrix card 102 b used to replace the primary router matrix card102 a in the event of a failure thereof, are supportably mounted.Similarly, the second broadcast router component 104 of themulti-chassis, fully redundant, linearly expandable broadcast router 100includes a chassis 104 c, within which a primary router matrix card 104a and a redundant router matrix card 104 b used to replace the primaryrouter matrix card 104 a in the event of a failure thereof, aresupportably mounted; the third broadcast router component 106 of themulti-chassis, fully redundant, linearly expandable broadcast router 100includes a chassis 106 c, within which a primary router matrix card 106a and a redundant router matrix card 106 b used to replace the primaryrouter matrix card 106 a in the event of a failure thereof, aresupportably mounted; and the fourth broadcast router component 108 ofthe multi-chassis, fully redundant, linearly expandable broadcast router100 includes a chassis 108 c, within which a primary router matrix card108 a and a redundant router matrix card 108 b used to replace theprimary router matrix card 108 a in the event of a failure thereof, aresupportably mounted. Of course, the designation of each of the routermatrix cards 102 b, 104 b, 106 b and 108 b as a redundant matrix cardfor use as a backup for the router matrix cards 102 a, 104 a, 106 a and108 a, respectively, in the event of a failure thereof is purelyarbitrary and it is fully contemplated that either one of a routermatrix card pair residing within a broadcast router component may act asa backup for the other of the router matrix pair residing within thatbroadcast router component.

While each of the broadcast router components 102, 104, 106 and 108include a primary and redundant router matrix cards, as will be morefull described below, the primary router matrix card for a broadcastrouter component may or may not be generally identical to the redundantrouter matrix card for that broadcast router component. Morespecifically, for the first broadcast router component 102, the primaryrouter matrix card 102 a is structured differently from the redundantrouter matrix card 102 b. Similarly, for the second broadcast routercomponent 104, the primary router matrix card 104 a is structureddifferently from the redundant router matrix card 104 b. For the thirdand fourth broadcast router components, however, the primary routermatrix cards 106 a and 108 a are generally identical to the redundantrouter matrix cards 106 b and 108 b, respectively. It should be noted,however, that for each of the broadcast router components 102, 104, 106and 108, however, the routing engine residing on the primary routermatrix card is generally identical to the routing engine residing on theredundant router matrix card.

As may be further seen in FIG. 1, the primary router matrix card 102 aof the first broadcast router component 102, the primary router matrixcard 104 a of the second broadcast router component 104, the primaryrouter matrix card 106 a of the third broadcast router component 106 andthe primary router matrix card 108 a of the fourth broadcast routercomponent 108 are coupled together in a first arrangement of routermatrix cards which conforms to a fully connected topology. Similarly,the redundant router matrix card 102 b of the first broadcast routercomponent 102, the redundant router matrix card 104 b of the secondbroadcast router component 104, the redundant router matrix card 106 bof the third broadcast router component 106 and the redundant routermatrix card 108 b of the fourth broadcast router component 108 arecoupled together in a second arrangement which, like the firstarrangement, conforms to a fully connected topology. In a fullyconnected topology, each router matrix card of an arrangement of routermatrix cards is coupled, by a discrete link, to each and every otherrouter matrix card forming part of the arrangement of router matrixcards.

Thus, for the first arrangement of router matrix cards, first, secondand third bi-directional links 110, 112 and 114 couples the primaryrouter matrix card 102 a residing within the chassis 102 c of the firstbroadcast router component 102 to the primary router matrix card 104 aresiding within the chassis 104 c of the second broadcast routercomponent 104, the primary router matrix card 106 a residing within thechassis 106 c of the third broadcast router component 106 and theprimary router matrix card 108 a residing within the chassis 108 c ofthe fourth broadcast router component 108, respectively. Additionally,fourth and fifth bi-directional links 116 and 118 couple the primaryrouter matrix card 104 a residing within the chassis 104 c of the secondbroadcast router component 104 to the primary router matrix card 106 aresiding within the chassis 106 c of the third broadcast routercomponent 106 and the primary router matrix card 108 a residing withinthe chassis 108 c of the fourth broadcast router component 108,respectively. Finally, a sixth bi-directional link 120 couples theprimary router matrix card 106 a residing within the chassis 106 c ofthe third broadcast router component 106 to the primary router matrixcard 108 a residing within the chassis 108 c of the fourth broadcastrouter component 108.

Similarly, for the second arrangement of router matrix cards, first,second and third bi-directional links 122, 124 and 126 couples theredundant router matrix card 102 b residing within the chassis 102 c ofthe first broadcast router component 102 to the redundant router matrix104 b residing within the chassis 104 c of the second broadcast routercomponent 104, the redundant router matrix card 106 b residing withinthe chassis 106 c of the third broadcast router component 106 and theredundant router matrix card 108 b residing within the chassis 108 c ofthe fourth broadcast router component 108, respectively. Additionally,fourth and fifth bi-directional links 128 and 130 couple the redundantrouter matrix card 104 b residing within the chassis 104 c of the secondbroadcast router component 104 to the redundant router matrix card 106 bresiding within the chassis 106 c of the third broadcast routercomponent 106 and the redundant router matrix card 108 b residing withinthe chassis 108 c of the fourth broadcast router component 108,respectively. Finally, a sixth bi-directional link 132 couples theredundant router matrix card 106 b residing within the chassis 106 c ofthe third broadcast router component 106 to the redundant router matrixcard 108 b residing within the chassis 108 c of the fourth broadcastrouter component 108.

The first, second, third and fourth broadcast router components 102,104, 106 and 108 will now be described in greater detail. FIG. 2 showsthe first broadcast router component 102. As previously set forth, thefirst broadcast router component 102 includes a primary router matrixcard 102 a and a redundant router matrix card 102 b, each of which areslideably received within and supportably mounted by the chassis 102 c(not shown in FIG. 2) of the first broadcast router component 102. Alsoslideably received within and supportably mounted by the chassis 102 areinput cards 136-1 through 136-N and output cards 138-1 through 138-M.Each input card 136-1 through 136-N is coupled to the primary routermatrix card 102 a and the redundant router matrix card 102 b. Likewise,each output card 138-1 through 138-M is coupled to the primary routermatrix card 102 a and the redundant router matrix card 102 b. Of course,while discrete input and output cards 136-1 through 136-N and 138-1through 138-M are shown in FIG. 2, it should be clearly understood that,if desired, the functionality residing on both the input and outputcards card, for example, the input card 136-1 and the output card 138-1may instead be placed on a single input/output (“I/O”) card.Furthermore, while FIG. 2 shows discrete input and output cards 136-1through 136-N and 138-1 through 138-M, it is fully contemplated that,depending on available space thereon, all or part of the functionalityshown as residing on either the input cards, for example, the input card136-1, the output cards, for example, the output card 138-1, or both,may instead reside on the primary router matrix card 102 a, theredundant router matrix card 102 b or some combination thereof.

Residing on each input card 136-1 through 136-N is input signalselection circuitry (not shown). The input signal selection circuitryselects, from plural input signals received thereby, an input signal tobe passed to both the primary router matrix card 102 a and the redundantrouter matrix card 102 b. Typically, the input signal selectioncircuitry is used to select between an input digital audio data streamconforming to the Audio Engineering Society-11 (“AES-11”) standard andan input digital audio data stream conforming to the multichanneldigital audio interface (“MADI”) standard set forth in the AES-10standard. In this regard, it should be noted that a MADI input digitalaudio data stream may contain up to 32 AES digital audio data streamsand that each of the inputs to the input selection circuitry wouldtypically contain a single AES digital audio data stream which hadpreviously been extracted from a MADI input digital audio data stream byextraction circuitry (also not shown). Of course, such a configurationis purely exemplary and it is fully contemplated that input signalselection circuitry is not necessary if the first broadcast routercomponent 102 is instead configured to receive, as inputs thereto, asingle type of digital audio data.

As the input selection circuitry residing on each one of the input cards136-1 through 136-N selects an input digital audio stream to betransmitted to each one of the primary and redundant router matrix cards102 a and 102 b, each one of the primary and redundant router matrixcards 102 a and 102 b receive, from the input cards 136-1 through 136-N,input digital audio signals 1 through N, respectively. Residing on theprimary router matrix card 102 a are a routing engine (“RE”) 140, atransmission expansion port (“EXP”) 146, first, second and thirdreceiving expansion ports (not shown), a first master clock (“CLK-A”)134 and a first state machine (“SM”) 148. The input digital audiostreams 1 through N propagating from the input cards 136-1 through 136-Nare transmitted to the routing engine 140 and the transmission expansionport 146. Operation of the routing engine 140 and the transmissionexpansion port 146 are described in greater detail in co-pending U.S.patent application Ser. No. 10/______ (Atty. Docket No IU020160) andpreviously incorporated by reference. Briefly, however, the N inputdigital audio data streams received by the transmission expansion port146 are forwarded to the primary router matrix card 104 a of the secondrouter matrix component 104, the primary router matrix card 106 a of thethird router matrix component 106 and the primary router matrix card 108a of the fourth router matrix component 108. The router matrix cards 104a, 106 a and 108 a are similarly provided with a transmission expansionport which transmit input digital audio data streams N+1 through 2N,2N+1 through 3N and 3N+1 through 4N respectively received thereby to therouting engine 140.

Together with the input digital audio data streams N+1 through 2N, 2N+1through 3N and 3N+1 through 4N received from the second, third andfourth broadcast router components 104, 106 and 108, respectively, theinput digital audio streams 1 through N output by the input cards 136-1through 136-N are provided as inputs to the routing engine 140. Signalselection functionality residing on the routing engine A140 allows eachone of the M outputs therefrom to be connected to a selected one of the4N inputs thereto. Selection of the particular one of the 4N inputs towhich each one of the M outputs is connected is controlled by controlcircuitry (also not shown). From the routing engine 140, each one of theM output digital audio data streams is propagated to a corresponding oneof the output cards 138-1 through 138-M. Residing on each one of theoutput cards 138-1 through 138-M is output signal selection circuitry(not shown) which selects, from a first output digital audio data streamreceived from the first router matrix card 102 a and a second outputdigital audio data stream received from the second router matrix card102 b, a digital audio data stream to be output the first broadcastrouter component 102.

As previously set forth, the first master clock 134 and the first statemachine 148 also reside on the first router matrix card 102 a of thefirst broadcast router component 102. As will be more fully describedbelow, the first master clock 134 provides a first common clock signalfor all clock-demanding components of the broadcast router 100. Asdisclosed herein, the input and output cards for each of the broadcastrouter components 102, 104, 106 and 108 are designated asclock-demanding components. However, the foregoing disclosure is purelyexemplary and it is fully contemplated that other components, includingthose shown in the drawings and/or omitted therefrom for ease ofillustration, may also be clock-demanding components. Accordingly, thefirst common clock signal generated by the first master clock 134 istied to a clock input CLK-A of each one of the input cards 136-1 through136-N and the output cards 138-1 through 138-M. The first common clocksignal generated by the first master clock 134 is also passed to thesecond broadcast router component 104 via the link 110 where it is tiedto a clock input CLK-A of each one of the input cards 142-1 through142-N and the output cards 144-1 through 144-M. It is contemplated thatthe first common clock signal generated by the first master clock 134may be distributed to other broadcast router components, for example,the broadcast router component 104, using a variety of techniques.Preferably, the first-master clock forwards the first common clocksignal CLK-A to the transmission expansion port 146 where it is be addedto the data signal being transmitted over the link 110 to the receivingexpansion ports residing on the primary router matrix card 104 a. Uponarrival of the data signal at the primary router matrix card 104 a, thefirst common clock signal CLK-A is extracted from the data signal forsubsequent distribution to the clock-demanding components of the primaryrouter matrix card 104 a. Alternately, it is contemplated that the firstcommon clock signal CLK-A may be transmitted over the link 110 using adiscrete line, for example, a conductive wire or optical fiber, toexclusively carry the first common clock signal by adding a line to theexisting line or lines which individually or collectively form the link110, for example, by intertwining the line carrying the first commonclock signal with the lines carrying the digital audio data signals 1through N from the transmission expansion port 146 to the secondbroadcast router component 104. In a similar fashion, the output of thefirst master clock 134 is also passed to the third and fourth broadcastrouter components 106 and 108 via the links 112 and 114, respectively,for distribution of the first common clock signal to all of the inputand output cards thereof as well. Of course, while FIG. 2 shows onlyinput and output cards as clock-demanding components, it is fullycontemplated that other components of the first broadcast routercomponent 102 illustrated in FIG. 2, as well as components of the firstbroadcast router component 102 omitted from FIG. 2 for ease ofillustration may also be clock-demanding components having a CLK-A inputto be coupled to the second master clock 134.

The first master clock 134 is controlled by the first state machine 148.As may be further seen in FIG. 2, the state machine 148 has a firstinput coupled to the routing engine 140, a second input coupled to thetransmission expansion port 146, a third input coupled to a routingengine 150 residing on the redundant router matrix card 104 b of thesecond broadcast router component 104, a fourth input coupled to atransmission expansion port 152 residing on the redundant router matrixcard 104 b of the second broadcast router component 104 and an outputcoupled to the first master clock 134. As disclosed herein, the thirdand fourth inputs to the state machine 148 which originate at the secondrouter matrix card 104 b of the second broadcast router component 104are coupled to the state machine 148 via the links 110 and 122,respectively. It is fully contemplated, however, that the third andfourth inputs may instead by coupled to the state machine 148 via theother one of the links or, if desired, both inputs may be coupled to thestate machine 148 by either the link 110 or the link 122. Furthermore,while precise details of the operation of the state machine 148 will bemore fully described below, briefly, the first state machine 148selectively activates/deactivates the first master clock 134 based uponthe operating condition for the routing engine 140, the transmissionexpansion port 146, the routing engine 150 and the transmissionexpansion port 152 coupled to the first, second, third and fourth inputsthereto.

Of the four components of the primary router matrix card 102 aillustrated in FIG. 2, the redundant router matrix card 102 b includesonly a transmission expansion port (not shown) coupled to receivedigital audio data input signals 1 through N from the input cards 136-1through 136-N and a routing engine (also not shown) coupled to receivedigital audio data signals 1 through N from the input cards 136-1through 136-N, digital audio data signals N+1 through 2N from theredundant router matrix card 104 b via the link 122, digital audiosignals 2N+1 through 3N from the redundant router matrix card 106 b viathe link 124 and digital audio signals 3N+1 through 4N from theredundant router matrix card 108 b via the link 126. The routing enginefurther includes M outputs coupled to output cards 1 through M,respectively. Signal selection functionality residing within the routingengine each one of the M outputs therefrom to be connected to a selectedone of the 4N inputs thereto. The routing engine 140 residing on theprimary router matrix card 102 a and the routing engine residing on theredundant router matrix card 102 b are identically controlled so thatthe M output digital audio data streams for the primary router matrixcard 102 a are the same as the M output digital audio data streams forthe redundant router matrix card 102 b.

FIG. 3 shows the second broadcast router component 104. As previouslyset forth, the second broadcast router component 104 includes a primaryrouter matrix card 104 a and a redundant router matrix card 104 b, eachof which are slideably received within and supportably mounted by thechassis 104 c (not shown in FIG. 3) of the second broadcast routercomponent 104. Also slideably received within and supportably mounted bythe chassis 104 are input cards 142-1 through 142-N and output cards144-1 through 144-M. Each input card 142-1 through 142-N is coupled tothe primary router matrix card 104 a and the redundant router matrixcard 104 b. Likewise, each output card 144-1 through 144-M is coupled tothe primary router matrix card 104 a and the redundant router matrixcard 104 b. Of course, while discrete input and output cards 142-1through 142-N and 144-1 through 144-M are shown in FIG. 3, it should beclearly understood that, if desired, the functionality residing on boththe input and output cards card, for example, the input card 142-1 andthe output card 144-1 may instead be placed on a single I/O card.Furthermore, while FIG. 3 shows discrete input and output cards 142-1through 142-N and 144-1 through 144-M, it is fully contemplated that,depending on available space thereon, all or part of the functionalityshown as residing on either the input cards, for example, the input card142-1, the output cards, for example, the output card 144-1, or both,may instead reside on the primary router matrix card 104 a, theredundant router matrix card 104 b or some combination thereof.

Residing on each input card 142-1 through 142-N is input signalselection circuitry (not shown). The input signal selection circuitryselects, from plural input signals received thereby, an input signal tobe passed to both the primary router matrix card 104 a and the redundantrouter matrix card 104 b. Typically, the input selection circuitry isused to select between an input digital audio data stream conforming tothe AES-11 standard and an input digital audio data stream conforming tothe MADI standard set forth in the AES-10 standard. Again, in thisregard, it should be noted that a MADI input digital audio data streammay contain up to 32 AES digital audio data streams and that each of theinputs to the input selection circuitry would typically contain a singleAES digital audio data stream which had previously been extracted from aMADI input digital audio data stream by extraction circuitry (also notshown). Of course, such a configuration is purely exemplary and it isfully contemplated that plural ones of the N+1 through 2N input digitalaudio data streams may be received from a single one of the input cards142-1 through 142-N.

As the input selection circuitry residing on each one of the input cards142-1 through 142-N selects an input digital audio data stream to betransmitted to each one of the primary and redundant router matrix cards104 a and 104 b, each one of the primary and redundant router matrixcards 104 a and 104 b receive, from the input cards 142-1 through 142-N,input digital audio signals N+1 through 2N, respectively. Residing onthe redundant router matrix card 104 b are the routing engine 150, thetransmission expansion port 152, first, second and third receivingexpansion ports (not shown), a second master clock (“CLK-B”) 154 and astate machine 156. The input digital audio streams N+1 through 2Npropagating from the input cards 142-1 through 142-N, respectively, aretransmitted to the routing engine 150 and the transmission expansionport 152. As previously noted, operation of the routing engine 150 andthe transmission expansion port 152 are described in greater detail inco-pending U.S. patent application Ser. No. 10/______ (Atty. Docket NoIU020160) and previously incorporated by reference. Briefly, however,the input digital audio data streams N+1 through 2N received by thetransmission expansion port 152 are forwarded to the redundant routermatrix card 102 b of the first router matrix component 102, theredundant router matrix card 106 b of the third router matrix component106 and the redundant router matrix card 108 b of the fourth routermatrix component 108. The router matrix cards 102 b, 106 b and 108 b aresimilarly provided with a transmission expansion port which transmitinput digital audio data streams 1 through N, 2N+1 through 3N and 3N+1through 4N respectively received thereby to the routing engine 150.

Together with the input digital audio data streams 1 through N, 2N+1through 3N and 3N+1 through 4N received from the first, third and fourthbroadcast router components 102, 106 and 108, respectively, the N+1through 2N input digital audio streams propagating from the input cards142-1 through 142-N are provided as inputs to the routing engine 150.Signal selection functionality residing on the routing engine 150 allowseach one of the M outputs therefrom to be connected to a selected one ofthe 4N inputs thereto. Selection of the particular one of the 4N inputsto which each one of the M outputs is connected is controlled by controlcircuitry (also not shown). From the routing engine 150, each one of theM output digital audio data streams is propagated to a corresponding oneof the output cards 144-1 through 144-M. Residing on each one of theoutput cards 144-1 through 144-M is output signal selection circuitry(not shown) which selects, from a first output digital audio data streamreceived from the first router matrix card 104 a and a second outputdigital audio data stream received from the second router matrix card104 b, a digital audio data stream to be output the second broadcastrouter component 104.

As previously set forth, the second master clock 154 and the statemachine 156 also reside on the second router matrix card 104 b of thesecond broadcast router component 104. As will be more fully describedbelow, the second master clock 154 provides a second, redundant, commonclock signal for all clock-demanding components of the broadcast router100. Accordingly, the output of the second master clock 154 is tied to aclock input CLK-B of each one of the input cards 142-1 through 142-N andthe output cards 144-1 through 144-M. The output of the second masterclock 154 is also passed to the first broadcast router component 102 viathe link 122-where it is tied to a clock input CLK-B of each one of theinput cards 136-1 through 136-N and the output cards 138-1 through138-M. Preferably, the second master clock 154 -forwards the secondcommon clock signal CLK-B to the transmission expansion port 152 whereit is be added to the data signal being transmitted over the link 122 tothe receiving expansion ports residing on the primary router matrix card102 a. Upon arrival of the data signal at the primary router matrix card102 a, the second common clock signal CLK-B is extracted from the datasignal for subsequent distribution to the clock-demanding components ofthe primary router matrix card 102 a. Alternately, it is contemplatedthat the second common clock signal CLK-B may be transmitted over thelink 124 using a discrete line, for example, a conductive wire oroptical fiber, to exclusively carry the second common clock signal byadding a line to the existing line or lines which individually orcollectively form the link 124, for example, by intertwining the linecarrying the first common clock signal with the lines carrying thedigital audio data signals N+1 through 2N from the transmissionexpansion port 152 to the first broadcast router component 104.Similarly, the output of the second master clock 154 is also passed tothe third and fourth broadcast router components 106 and 108 via thelinks 128 and 130, respectively, for distribution to all of the inputand output cards thereof as well. Of course, while FIG. 3 shows onlyinput and output cards as clock-demanding components, it is fullycontemplated that other components of the second broadcast routercomponent 104 illustrated in FIG. 3, as well as components of the secondbroadcast router component 104 omitted from FIG. 3 for ease ofillustration may also be clock-demanding components having a CLK-B inputto be coupled to the second master clock 154. It should be kept in mind,however, that all clock-demanding components of the multi-chassis, fullyredundant, linearly expandable broadcast router 100 should be configuredto include both CLK-A and CLK-B inputs respectively coupled to the firstmaster clock 134 and the second master clock 154, respectively.

The second master clock 154 is controlled by the state machine 156. Asmay be further seen in FIG. 3, the state machine 156 has a first inputcoupled to the routing engine 150, a second input coupled to thetransmission expansion port 152, a third input coupled to the routingengine 140 residing on the primary router matrix card 102 a of the firstbroadcast router component 104, a fourth input coupled to thetransmission expansion port 146 residing on the primary router matrixcard 102 a of the first broadcast router component 102 and an outputcoupled to the second master clock 154. As disclosed herein, the thirdand fourth inputs to the state machine 156 which originate at the firstrouter matrix card 102 a of the first broadcast router component 102 arecoupled to the state machine 156 via the links 122 and 110,respectively. It is fully contemplated, however, that the third andfourth inputs may instead by coupled to the state machine 156 via theother one of the links or, if desired, both inputs may be coupled to thestate machine 156 by either the link 110 or the link 122. Furthermore,while precise details of the operation of the state machine 156 will bemore fully described below, briefly, the state machine 156 selectivelyactivates/deactivates the second master clock 154 based upon theoperating conditions for the routing engine 150, the transmissionexpansion port 152, the routing engine 140 and the transmissionexpansion port 146 coupled thereto.

Of the four components of the redundant router matrix card 104 billustrated in FIG. 3, the primary router matrix card 104 a includesonly a transmission expansion port (not shown) coupled to receivedigital audio data input signals N+1 through 2N from the input cards142-1 through 142-N and a routing engine (also not shown) coupled toreceive digital audio data signals N+1 through 2N from the input cards142-1 through 142-N, digital audio data signals 1 through N from theprimary router matrix card 102 a via the link 110, digital audio signals2N+1 through 3N from the primary router matrix card 106 a via the link116 and digital audio signals 3N+1 through 4N from the primary routermatrix card 108 a via the link 118. The routing engine further includesM outputs coupled to output cards 1 through M, respectively. Signalselection functionality residing within the routing engine each one ofthe M outputs therefrom to be connected to a selected one of the 4Ninputs thereto. The routing engine 150 residing on the redundant routermatrix card 104 b and the primary engine residing on the first routermatrix card 104 a are identically controlled so that the M outputdigital audio data streams for the primary router matrix card 104 a arethe same as the M output digital audio data streams for the redundantrouter matrix card 104 b.

The third and fourth broadcast router components 106 and 108 aregenerally identical to one another and somewhat similar to the first andsecond broadcast router components 102 and 104. As previously set forth,the third broadcast router component 106 includes a primary routermatrix card 106 a and a redundant router matrix card 106 b, each ofwhich are slideably received within and supportably mounted by thechassis 106 c. Similarly, the fourth broadcast router component 108includes a primary router matrix card 108 a and a redundant routermatrix card 108 b, each of which are slideably received within andsupportably mounted by the chassis 108 c. The primary and redundantrouter matrix cards 106 a and 106 b of the third broadcast routercomponent 106, as well as the primary and redundant router matrix cards108 a and 108 b of the fourth broadcast router component 108 aresimilarly generally identically configured to the redundant routermatrix card 102 b of the first broadcast router component 102 and/or theprimary router matrix card 104 a of the second broadcast routercomponent 104. In other words, the primary router matrix cards 106 a and108 a, as well as the redundant router matrix cards 106 b and 108 b allinclude a transmission expansion port, a routing engine and pluralreceiving expansion ports but include neither a master clock nor a statemachine.

Each of the third and fourth broadcast router components 106 and 108further include N input cards and M output cards, all of which areslideably received within and supportably mounted by the chassis 106 cand 108 c, respectively. Each input and output card of the thirdbroadcast router component 106 is coupled to each one of the primaryrouter matrix card 106 a and the redundant router matrix card 106 b.Similarly, each input and output card of the fourth broadcast routercomponent 108 is coupled to each one of the primary router matrix card108 a and the redundant router matrix card 108 b. Like the input andoutput cards of the first and second broadcast router components 102 and104, each input and output card of the third and fourth broadcast routercomponents 106 and 108 include both a CLK-A input and a CLK-B input tiedto the first and second master clocks 134 and 154, respectively. Morespecifically, the input and output cards of the third broadcast routercomponent 106 are tied to the first master clock 134 via the link 112and to the second master clock 154 via the link 128 while the input andoutput cards of the fourth broadcast router component 108 are tied tothe first master clock 134 via the link 114 and to the second masterclock 154 via the link 130.

As previously set forth, the clock-demanding components residing in eachchassis 102 c, 104 c, 106 c and 108 c of the multi-chassis broadcastrouter 100 are coupled to receive a common clock signal, for example,the CLK-A signal generated by the first master clock 134. Theclock-demanding components residing in each chassis 102 c, 104 c, 106 cand 108 c of the broadcast router 100 are further coupled to receive aredundant common clock signal, for example, the CLK-B signal generatedby the second master clock 154. Redundancy is handled in such a way,however, that any router matrix card, for example, the router matrixcard 102 a, or any chassis, for example, the chassis 104 b can failwithout causing the entire broadcast router 100 to fail. Table I, below,illustrates the logic implemented to enable this result. As used inTable I, below, a router matrix card for a broadcast router component isdeemed to be “OK” when the router matrix card is both present andrunning. Further, a transmission expansion port is deemed to be “locked”when the frequency of the clock signal received from the master clockwhich resides, with the transmission expansion port, on a router matrixcard, is relatively constant. TABLE I Primary Router Redundant MatrixCard TX Port Router Matrix TX Port Master Router 102a OK 146 Locked Card104b OK 152 Locked Clock Status Yes Yes Don't Care Don't Care Clock 134Full Yes No Yes Yes Clock 154 Full No Don't Care Yes Yes Clock 154 FullYes No Yes No Clock 134 Partial No Don't Care Yes No Clock 154 PartialNo Don't Care No Don't Care None None

As previously set forth, by implementing redundancy of the common clocksignal in accordance with the requirements set forth in Table I, anyrouter matrix card, for example, the router matrix card 102 a or anychassis, for example, the chassis 104 c, can fail without causing theentire broadcast router 100 to fail. More specifically, if the firstbroadcast router 102 is working properly, i.e., the router matrix card102 a is okay and the transmission expansion port 146 is locked, thefirst master clock 134 distributes clock signal CLK-A as a common clocksignal to all of the clock-demanding components of the multi-chassisbroadcast router 100, thereby enabling the multi-chassis broadcastrouter 100 to operate at full status. If, however, the primary routermatrix card 102 a fails due to the transmission expansion port 146becoming unlocked, while the first master clock can still generate theclock signal CLK-A, the clock signal can no longer be distributedthroughout the multi-chassis broadcast router 100. In this situation, ifthe redundant router matrix card 104 b is okay and the transmissionexpansion port 152 is locked, the second master clock 154 can distributethe clock signal CLK-B as a common clock signal to all of theclock-demanding components of the multi-chassis router 100, therebyenabling the multi-chassis broadcast router 100 to continue operating atfull status. Similarly, if the primary router matrix card 102 hasfailed, for example, if the primary router matrix card 102 a is missing,the first master clock 134 will be unable to supply the clock signalclock-A. Under this scenario, regardless of whether the transmissionexpansion port 146 is locked, the second master clock 154 shall, if theredundant router matrix card 104 b is okay and the transmissionexpansion port 152 is locked, again distribute the clock signal CLK-B asa common clock signal to all of the clock-demanding components of themulti-chassis router 100, thereby enabling the multi-chassis broadcastrouter 100 to continue operating at full status.

If the primary router matrix card 102 a is okay but neither transmissionexpansion port 146 nor transmission expansion port 152 are locked, thefirst master clock 134 shall be the master clock for-the multi-chassisbroadcast router 100. While the first master clock 134 is still able togenerate the clock signal CLK-A, the clock signal CLK-A cannot bedistributed to the other chassis of the multi-chassis broadcast router100. As only the clock-demanding components of the broadcast routercomponent 102 will have a common clock signal, the multi-chassisbroadcast router 100 will be operating at partial status. If, on theother hand, the primary router matrix card 102 a has failed, theredundant router matrix card 104 b remains okay, but the transmissionexpansion port 152 is not locked, the second master clock 154 shall bethe master clock for the multi-chassis broadcast router 100. While thesecond master clock 154 is still able to generate the clock signalCLK-B, the clock signal CLK-B cannot be distributed to the other chassisof the multi-chassis broadcast router 100. As only the clock-demandingcomponents of the broadcast router component 104 will have a commonclock signal, the multi-chassis broadcast router 100 will again beoperating at partial status. Finally, if both the primary router matrixcard 102 a and the redundant router matrix card 104 b have failed, therewill be no master clock for the multi-chassis broadcast router and, asthere will not be a common clock signal available for theclock-demanding components of the multi-chassis broadcast router 100,the multi-broadcast router 100 will completely fail.

Table I, above, may be implemented using Boolean logic. However, bydoing so, less than ideal behavior may occur. It is highly desirable tohave the removal or insertion of primary or redundant router matrixcards not to cause any flaws in the outputs of the router. Use of anon-glitching clock mux circuits for switches between locked and notlocked states and for switching between clocks will eliminate mostproblems. The problem is caused when master clocks 134 and 154 haveslightly different frequencies. When a router matrix card is removed orfails, this result is unavoidable. However, insertion of a router matrixcard does not necessarily have to result in this problem. In otherwords, it is advantageous if a newly inserted router matrix card doesnot become the master until needed.

An exemplary logical implementation of Table I, above is shown in thestate diagrams illustrated in FIGS. 4 and 5. More specifically, thefirst state machine 148 has three states, a first (“master” (or “M”))state 158 in which the first state machine 148 issues an instruction tothe first master clock 134 to issue the signal CLK-A to all of theclock-demanding components of the multi-chassis broadcast router 100, asecond (“backup” (or “B”)) state 160 where the first state machine 148issues an instruction to the-first master clock 134 not to issue thesignal CLK-A to all of the clock-demanding components of themulti-chassis broadcast router 100 and a third (“dead” (or “D”)) state162 where the first state machine 148 will again issue an instruction tothe first master clock 134 not to issue the signal CLK-A to all of theclock-demanding components of the multi-chassis broadcast router 100.Initially, the first state machine is in the first state 158. In thisstate, the input from the routing engine 140 indicates that first routermatrix card 102 a is present and running and the input from thetransmission expansion port 146 indicates that it is locked. The inputsfrom the routing engine 150 and the transmission expansion port 152 areirrelevant. In the first state 158, the first state machine 148 issues asignal to the first master clock 158 instructing the first master clock158 to provide the common clock signal CLK-A to all of theclock-demanding components of the multi-chassis broadcast router 100.Furthermore, as all of the clock-demanding components of themulti-chassis broadcast router 100 are receiving the common clock signalCLK-A from the first master clock 134, the status of the broadcastrouter is “FULL”, i.e., all of the broadcast router components 102, 104,106 and 108 are operating.

Regardless of operating conditions for the second master clock 154, thefirst master clock 134 will continue to supply the common clock signalCLK-A until either the routing engine 140 or the transmission expansionport 146 fail. A routing engine failure occurs if the input from therouting engine 140 changes such that it now indicates that the firstrouter matrix card 102 a is either absent or no longer running. Atransmission expansion port failure occurs if the input from thetransmission expansion port 146 indicates that the clock signal is nolonger constant. If either of these conditions occurs, the first statemachine 140 will transition to the third state 162. In this state, thefirst state machine 148 issues a signal to the first master clock 134not to distribute the common clock signal CLK-A to the clock-demandingcomponents of the multi-chassis broadcast router 100. As may be seen inTable I, whether or not all, part or none of the clock-demandingcomponents of the broadcast router 100 will have a common clock signalwill depend on the state of the second state machine 156.

From the third state 162, the first state machine 148 will transition toeither the first state 158 or the second state 160. This transition willoccur when the input from the routing engine 140 again indicates thatthe first router matrix card 102 a is present and running and the inputfrom the transmission expansion port 146 again indicates that the portis locked. The particular transition that will occur depends on thecondition of the second state machine 156. More specifically, if thesecond state machine 156 is in a first (“master”) state 164, the secondstate machine 156 is currently issuing a signal to the second masterclock 154 to distribute the common clock signal CLK-B to theclock-demanding components of the broadcast router 100. If the secondmaster clock 154 is distributing the common clock signal CLK-B, thethird and fourth inputs to the first state machine 148 will indicatethat the redundant router matrix card 104 b is okay and the transmissionexpansion port 152 is locked. In response, the first state machine 148will transition to the third state 160 where it will issue aninstruction to the first master clock 134 to not distribute the commonclock signal CLK-A. If, however, the second state machine 156 is in anyother state, the first state machine 148 will transition to the firststate 158 where it will again issue a signal to the first master clock134 to distribute the common clock signal CLK-A.

From the second state 160, the first state machine 148 will transitionto either the third state 162 or the first state 158. The transition tothe third state 162 can occur independent of the second state machine156. Specifically, the first state machine 148 will transition to thethird state 162 if the first input thereto indicates that the routingengine 140 has failed or if the second input thereto indicates that thetransmission expansion port 146 has failed. The transition to the firststate 158, on the other hand, can only occur as a result of the secondstate machine 156 undergoing a transition. Specifically, if the secondstate machine 156 transitions from the first state 164 to a third state168, the third or fourth inputs to the first state machine 148 willindicate that the redundant router matrix card 104 b is not okay and/orthe transmission expansion port 146 is not locked.

Referring next to FIG. 5, the state machine has four states, the firststate 164 in which the second state machine 156 issues an instruction tothe second master clock 154 to issue the signal CLK-B to all of theclock-demanding components of the multi-chassis broadcast router 100, asecond state 166 where the second state machine 156 issues aninstruction to the second master clock 154 not to issue the signal CLK-Bto all of the clock-demanding components of the multi-chassis broadcastrouter 100, the third state 168 where the second state machine 156 willagain issue an instruction to the second master clock 154 not to issuethe signal CLK-B to all of the clock-demanding components of themulti-chassis broadcast router 100 and a fourth (“wait” (or “W”)) state160 in which the second state machine 156 again issues an instruction tothe second master clock 154 not to issue the signal CLK-B to all of theclock-demanding components of the multi-chassis broadcast router 100.Initially, the second state machine 156 is in the second state 158. Inthis state, the input from the routing engine 140 indicates that primaryrouter matrix card 102 a is present and running and the input from thetransmission expansion port 146 indicates that it is locked. Similarly,the inputs from the routing engine 150 indicates that the redundantrouter matrix card 104 b is present and running and the input from thetransmission port 152 indicates that it is locked. In the second state166, the second state machine 156 issues a signal to the second masterclock 154 instructing the second master clock 154 not to provide thecommon clock signal CLK-B to all of the clock-demanding components ofthe multi-chassis broadcast router 100.

From the second state 166, the second state machine may transition toeither the third state 168 or the first state 164. Transition to thethird state 168 may occur regardless of the state of the first statemachine 148. More specifically, the state machine 156 will transition tothe third state 168 if the input from the routing engine 150 indicatesthat the redundant router matrix card 150 has failed or the input fromthe transmission expansion port 156 indicates it is no longer locked. Inthe third state 168, the state machine 156 will again issue aninstruction to the second master clock 154 instructing the master clock154 not to distribute the common clock signal CLK-B to theclock-demanding components of the multi-chassis broadcast router 100.Conversely, the second state machine 166 can only transition from thesecond state 166 to the first state 164 upon transition of the firststate machine 148 from either the first state 158 or the second state160 into the third state 162. The second state machine 156 will beadvised that such a transition has occurred upon the input from therouting engine 140 indicating that the primary router matrix card 102 ahas failed or the input from the transmission expansion port 146indicating that the clock signal is no longer constant. If either ofthese conditions occurs, the second state machine 156 will transitionfrom the second state 166 to the first state 164. In this state, thesecond state machine 156 issues a signal to the second master clock 154to distribute the common clock signal CLK-B to the clock-demandingcomponents of the multi-chassis broadcast router 100.

From the first state 164, the second state machine 156 may onlytransition to the third state 168. This transition can only occur upontransition of the first state machine 148 from either the first state158 or the second state 160 into the third state 162. The second statemachine 156 will be advised that such a transition has occurred upon theinput from the routing engine 140 indicating that the primary routermatrix card 102 a has failed or the input from the transmissionexpansion port 146 indicating that the clock signal is no longerconstant. If either of these conditions occurs, the second state machine156 will transition from the first state 164 to the third state 168. Inthis state, the second state machine 156 issues a signal to the secondmaster clock 154 to not distribute the common clock signal CLK-B to theclock-demanding components of the multi-chassis broadcast router 100.

From the third state 168, the second state machine 156 may onlytransition to the fourth state 160. This transition can only occur uponthe input from the routing engine 150 indicating that the redundantrouter matrix card 104 b is present and running and/or the input fromthe transmission expansion port 152 indicating that the port is locked.In the fourth state 170, the second state machine 156 will issue asignal to the second master clock 154 not to distribute the common clocksignal CLK-B to the clock-demanding components of the broadcast router100. Finally, from the fourth state 170, the second state machine 156may transition to any one of the first, second or third states 164, 166or 168. More specifically, the second state machine 156 will transitionto the first state 164 if the input from the routing engine 140indicates that the primary router matrix card has failed and/or theinput from the transmission expansion port 146 indicates that the portis not locked. Conversely, the second state machine 170 will transitionto the second state 166 if the input from the routing engine 140indicates that the primary router matrix card 102 a is present andrunning and the input from the transmission expansion port 146 indicatesthat the port is locked. Finally, the second state machine 170 willtransition to the third state 168 if the input from the routing engine150 indicates that the redundant router matrix card 104 b has failedand/or the input from the transmission expansion port 152 indicates thatthe port is not locked.

Of course, while preferred embodiments of this invention have been shownand described herein, various modifications and other changes can bemade by one skilled in the art to which the invention pertains withoutdeparting from the spirit or teaching of this invention. Accordingly,the scope of protection is not limited to the embodiments describedherein, but is only limited by the claims that follow.

1. A multi-chassis broadcast router, comprising: a first chassis inwhich a first routing engine and at least one clock-demanding componentreside; a second chassis in which a second routing engine and at leastone clock-demanding component reside; a first link coupling an inputside of said first routing engine residing in said first chassis and aninput side of said second routing engine residing in said secondchassis; and a master clock residing in said first chassis, said masterclock coupled to said at least one clock-demanding component residing insaid first chassis and to said at least one clock-demanding componentresiding in said second chassis via said first link, said master clocksupplying said at least one clock-demanding component residing in saidfirst chassis and said at least one clock-demanding component residingin said second chassis with a common clock signal.
 2. The apparatus ofclaim 1, and further comprising: a first router matrix card supportablymounted by said first chassis, said first routing engine and said masterclock residing on said first router matrix card; and wherein said atleast one clock demanding component further comprises at least one inputcard and at least one output card.
 3. The apparatus of claim 1, andfurther comprising: a third chassis in which a third routing engine andat least one clock-demanding component reside; a second link couplingsaid input side of said first routing engine residing in said firstchassis and an input side of said third routing engine residing in saidthird chassis, said master clock residing in said first chassis coupledto said at least one clock-demanding component residing in said thirdchassis via said second link; wherein said master clock residing in saidfirst chassis supplies said at least one clock-demanding componentresiding in said third chassis with said common clock signal through. 4.The apparatus of claim 3, and further comprising: a third link couplingsaid input side of said second routing engine residing in said secondchassis and said input side of said third routing engine residing insaid third chassis; wherein said first routing engine residing in saidfirst chassis, said second routing engine residing in said secondchassis and said third routing engine residing in said third chassis arearranged in a fully connected topology.
 5. The apparatus of claim 4,wherein a redundant routing engine resides in each one of said first,second and third chassis.
 6. The apparatus of claim 5, and furthercomprising: a fourth link coupling an input side of said redundantrouting engine residing in said first chassis to an input side of saidredundant routing engine residing in said second chassis; a fifth linkcoupling said input side of said redundant routing engine residing insaid first chassis to an input side of said redundant routing engineresiding in said third chassis; and a sixth link coupling said inputside of said redundant routing engine residing in said second chassis tosaid input side of said redundant routing engine residing in said thirdchassis; wherein said redundant routing engine residing in said firstchassis, said redundant routing engine residing in said second chassisand said redundant routing engine residing in said third chassis arearranged in a second fully connected topology.
 7. A multi-chassisbroadcast router, comprising: a first chassis, said first chassissupportably mounting a first router matrix card, a redundant routermatrix card, at least one clock-demanding input card and at least oneclock-demanding output card; a second chassis, said first chassissupportably mounting a first router matrix card, a redundant routermatrix card, at least one clock-demanding input card and at least oneclock-demanding output card; a first master clock residing on said firstrouter matrix card supportably mounted within said first chassis, saidfirst master clock coupled to said at least one clock-demanding inputcard and said at least one clock-demanding output card supportablymounted by said first chassis and to said at least one clock-demandinginput card and said at least one clock-demanding output card supportablymounted by said second chassis, said first master clock supplying saidat least one clock-demanding input card and said at least oneclock-demanding output card supportably mounted by said first chassisand said at least one clock-demanding input card and said at least oneclock-demanding output card supportably mounted by said second chassiswith a common clock signal; a second master clock residing on saidredundant router matrix card supportably mounted within said secondchassis, said second master clock coupled to said at least oneclock-demanding input card and said at least one clock-demanding outputcard supportably mounted by said first chassis and to said at least oneclock-demanding input card and said at least one clock-demanding outputcard supportably mounted by said second chassis, said second masterclock supplying said at least one clock-demanding input card and said atleast one clock-demanding output card supportably mounted by said firstchassis and said at least one clock-demanding input card and said atleast one clock-demanding output card supportably mounted by said secondchassis with a redundant common clock signal; and control logic coupledto said first master clock and said second master clock A, said controllogic determining whether said first master clock should issue saidcommon clock signal or whether said second master clock should issuesaid redundant common clock signal.
 8. The apparatus of claim 7, whereinsaid control logic has a first input coupled to said first router matrixcard supportably mounted by said first chassis and a second inputcoupled to said redundant router matrix supportably mounted by saidsecond chassis, said control logic determining, based upon a firstsignal received via said first input and a second signal received viasaid second input whether said first master clock should issue saidcommon clock signal or whether said second master clock should issuesaid redundant common clock signal.
 9. The apparatus of claim 8,wherein: a first routing engine and a first transmission expansion portreside on said first router matrix card supportably mounted by saidfirst chassis; and wherein: a second routing engine and a secondtransmission expansion port reside on said redundant router matrix cardsupportably mounted by said second chassis.
 10. The apparatus of claim9, wherein: said first input to said control logic is coupled to saidfirst routing engine residing on said router matrix card supportablymounted by said first chassis and said second input to said controllogic is coupled to said second routing engine residing on saidredundant router matrix card supportably mounted by said second chassis;and wherein said control logic has a third input coupled to saidtransmission expansion port residing on said router matrix cardsupportably mounted by said first chassis and a fourth input coupled tosaid second transmission expansion port residing on said redundantrouter matrix card supportably mounted by said second chassis saidcontrol logic determining, based upon said first signal received viasaid first input, said second signal received via said second input, athird signal received via said third input and a fourth signal receivedvia said fourth input, whether said first master clock should issue saidcommon clock signal or said second master clock should issue saidredundant common clock signal.
 11. The apparatus of claim 10, whereinsaid control logic further comprises: a first state machine residing onsaid first router matrix card supportably mounted by said first chassis;a second state machine residing on said redundant router matrix cardsupportably mounted by said second chassis; said first state machinedetermining, based upon said first signal received via said first input,said second signal received via said second input, said third signalreceived via said third input and said fourth signal received via saidfourth input, whether said first master clock should issue said commonclock signal; and said second state machine determining, based upon saidfirst signal received via said first input, said second signal receivedvia said second input, said third signal received via said third inputand said fourth signal received via said fourth input, whether saidsecond master clock should issue said redundant common clock signal;wherein only one of said common clock signal and said redundant commonclock signal can be issued at one time.